Toshiba has developed three key technologies to overcome these challenges:
- Column CDS circuits primarily made up of area-efficient PMOS capacitors. The area of the CDS circuits is reduced to about half that of conventional circuits.
- In the readout circuits, a level shift function is simultaneously achieved by a capacitive coupling through the PMOS capacitors, allowing adjustment of the signal dynamic range between the column CDS circuits and the PGA and the ADC. This achieves low power and low voltage implementation of the PGA and ADC, reducing their power consumption by 40%.
- Implementation of a low power switching procedure in the ADC suited to processing the pixel signals of CMOS image sensors. This reduces the switching power consumption of the ADC by 80%.